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A multilevel memristor-CMOS memory cell as a ReRAM

机译:多级忆阻器CMOS存储单元作为ReRAM

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Memristor is a newly invented device and since it has been found, has drawn a lot of attention from integrated electronics designers because of its nanometer size and special electrical properties. One of the most significant characteristics of a memristor is its memory property. In this paper, a nonvolatile memory cell, based on the hybrid structure of memristor and Complementary Metal-Oxide-Semiconductor (CMOS) is proposed which can be used as a resistive Random Access Memory (RAM). This cell can store data in either binary or non-binary (multilevel) logic, increasing the amount of storable data per square area of a memory chip by increasing the levels of stored data. The methodologies of work with this multilevel logic and data saving and retention are discussed and the suitable one is chosen. The proposed memory cell has a read time comparable to other RAMs and flash memories and percent's of area reduction per two bits of data with at least 50% increase in reading speed - for ternary logic - per data. Power consumption is also reduced. The buffer for this cell corresponding to ternary logic is also presented. (C) 2015 Elsevier Ltd. All rights reserved.
机译:忆阻器是一种新发明的器件,自从被发现以来,由于其纳米尺寸和特殊的电性能而引起了集成电子设计人员的广泛关注。忆阻器最重要的特征之一是其记忆特性。本文提出了一种基于忆阻器和互补金属氧化物半导体(CMOS)的混合结构的非易失性存储单元,可以用作电阻型随机存取存储器(RAM)。该单元可以以二进制或非二进制(多级)逻辑存储数据,通过增加存储数据的级别来增加存储芯片每平方面积的可存储数据量。讨论了使用这种多层次逻辑以及数据保存和保留的方法,并选择了合适的方法。所提出的存储单元具有与其他RAM和闪存相当的读取时间,并且每两位数据的面积减少百分比,并且对于三元逻辑,每数据读取速度至少增加50%。功耗也降低了。还提供了对应于三元逻辑的该单元的缓冲区。 (C)2015 Elsevier Ltd.保留所有权利。

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