Experimental and Theoretical Study of 4H-SiC JFET Threshold Voltage Body Bias Effect from 25 ℃ to 500 ℃

摘要

This work reports a theoretical and experimental study of 4H-SiC JFET threshold voltage as a function of substrate body bias, device position on the wafer, and temperature from 25 ℃ (298K) to 500 ℃ (773K). Based on these results, an alternative approach to SPICE circuit simulation of body effect for SiC JFETs is proposed.