首页> 外国专利> SEMICONDUCTOR DEVICE CAPABLE OF MINIMIZING DEPENDABILITY OF A THRESHOLD VOLTAGE DUE TO A BODY BIAS VOLTAGE IN FORMING A RECESS GATE, AND A MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE CAPABLE OF MINIMIZING DEPENDABILITY OF A THRESHOLD VOLTAGE DUE TO A BODY BIAS VOLTAGE IN FORMING A RECESS GATE, AND A MANUFACTURING METHOD THEREOF

机译:能够最小化由于形成偏置闸门而造成的身体偏置电压的阈值电压的下降的半导体装置及其制造方法

摘要

PURPOSE: A semiconductor device and a manufacturing method thereof are provided to prevent reduction of an operation range of a transistor according to a body bias voltage by preventing reduction of a current due to source voltage rising.;CONSTITUTION: A semiconductor device(100) includes a recess gate, a silicon epitaxial layer(106), and an insulation film(104). The silicon epitaxial layer and the insulation film are successively formed on a bottom part of the recess gate. A groove(H) is formed inside the semiconductor substrate. The insulation film is formed on a bottom surface of the groove. The silicon epitaxial layer is grown on the insulation film. The recess gate is formed on the groove in which the silicon epitaxial layer is formed.;COPYRIGHT KIPO 2010
机译:目的:提供一种半导体器件及其制造方法,以通过防止由于源极电压升高而引起的电流减小来防止根据体偏置电压而减小晶体管的工作范围。构成:一种半导体器件(100),包括凹陷栅极,硅外延层(106)和绝缘膜(104)。硅外延层和绝缘膜依次形成在凹入栅极的底部上。在半导体基板的内部形成有槽(H)。绝缘膜形成在凹槽的底表面上。硅外延层生长在绝缘膜上。在形成硅外延层的凹槽上形成凹槽栅极。; COPYRIGHT KIPO 2010

著录项

  • 公开/公告号KR20090110693A

    专利类型

  • 公开/公告日2009-10-22

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20080036317

  • 发明设计人 SEO MOON SIK;

    申请日2008-04-18

  • 分类号H01L29/78;

  • 国家 KR

  • 入库时间 2022-08-21 19:12:23

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