Minimized Device Junction Leakage Current at Forward-Bias Body and Applications for Low-Voltage Quadruple-Stacked Common-Gate Amplifier

摘要

Minimized device junction leakage current at forward-bias body and applications for low-voltage quadruple-stacked common-gate (CG) low-noise amplifier (LNA) is presented in this paper. Diode-connected MOSFETs are proposed to insert between the device bulks and forward bias, resulting in the back-to-back connected diodes and minimized junction leakage current. In addition, interstage matching networks are introduced to the quadruple-stacked CG stages to significantly enhance the small-signal gain of the amplifier. Based on the proposed circuit architectures, the fabricated 0.18- $mu{rm m}$ complementary metal–oxide–semiconductor LNA can operate at 0.5 V low supply voltage, exhibiting a measured low dc power dissipation of 6.3 mW, high gain of 16 dB, and low noise figure of 5.6 dB at 27.5 GHz. In addition, the theories for analyzing the proposed quadruple-stacked CG amplifier are given in detail, and the mechanisms are validated by experiments.