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首页> 外文期刊>Journal of Lightwave Technology >A three-dimensional high-throughput architecture using through-wafer optical interconnect
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A three-dimensional high-throughput architecture using through-wafer optical interconnect

机译:使用晶片光互连的三维高通量架构

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摘要

This paper presents a three-dimensional, highly parallel, optically interconnected system to process high-throughput stream data such as images. The vertical optical interconnections are realized using. Integrated optoelectronic devices operating at wavelengths to which silicon is transparent. These through-wafer optical signals are used to vertically optically interconnect stacked silicon circuits. The thin film optoelectronic devices are bonded directly to the stacked layers of silicon circuitry to realize self-contained vertical optical interconnections. Each integrated circuit layer contains analog interface circuitry, namely, detector amplifier and emitter driver circuitry, and digital circuitry for the network and/or processor, all of which are fabricated using a standard silicon integrated circuit foundry. These silicon circuits are post processed to integrate the thin film optoelectronics using standard, low cost, high yield microfabrication techniques. The three-dimensionally integrated architectures described herein are a network and a processor. The network has been designed to meet off-chip I/O using a new offset cube topology coupled with naming and renting schemes. The performance of this network is comparable to that of a three-dimensional mesh. The processing architecture has been defined to minimize overhead for basic parallel operations. The system goal for this research is to develop an integrated processing node for high-throughput, low-memory applications.
机译:本文提出了一种三维,高度并行的光学互连系统,用于处理高吞吐量的流数据,例如图像。垂直光互连通过使用来实现。在硅透明的波长下工作的集成光电设备。这些晶片光信号用于垂直地光学互连堆叠的硅电路。薄膜光电器件直接结合到硅电路的堆叠层上,以实现独立的垂直光学互连。每个集成电路层包含模拟接口电路,即检测器放大器和发射极驱动器电路,以及用于网络和/或处理器的数字电路,所有这些均使用标准的硅集成电路铸造厂制造。使用标准,低成本,高产量的微制造技术对这些硅电路进行后处理,以集成薄膜光电。本文描述的三维集成架构是网络和处理器。该网络已设计为使用新的偏移立方体拓扑以及命名和租用方案来满足片外I / O。该网络的性能可与三维网格相媲美。已经定义了处理体系结构以最小化基本并行操作的开销。这项研究的系统目标是为高吞吐量,低内存应用程序开发一个集成处理节点。

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