Electrostatically doped tunnel CNTFET model for low-power VLSI circuit design

摘要

With advantages such as low sub-threshold swing, low OFF-state current and the ability to attain a higher ON–OFF ratio, the tunnel CNTFET is one of the most comprehensively investigated devices for low-power application. The problems associated with this device are fabrication issues since conventional doping is not possible in CNTs. Therefore, a doping-less tunnel CNTFET is proposed which is free from problems associated with a conventional tunnel CNTFET. A mathematical model is developed for an electrostatically doped tunnel CNTFET, and to validate the model accuracy and the equation set, the simulation results are compared with NanoTCAD ViDES results. Finally, the developed model is deployed in an inverter design to verify the suitability of the model for circuit applications.