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Common case optimized circuit structure for high-performance and low-power VLSI designs

机译:针对高性能和低功耗VLSI设计的常见情况优化电路结构

摘要

This present invention presents a Common Case Computation (CCC) based design. A computation circuit with reduced power consumption, said computation circuit having a plurality of components. The components include a general purpose circuit, a common case detection circuit and a common case execution circuit. The common case detection circuit detects an occurrence of a common case based on a first subset of primary inputs and a first subset of internal variables for the general purpose circuit, and the common case execution circuit computes a subset of primary outputs of the general purpose circuit based on a second subset of primary inputs for the general purpose circuits and a second subset of internal variables for the general purpose circuit. The first subset of the primary inputs and the first subset of internal variables can be the same as the second subset of primary variables and the second subset of internal variables respectively. The common case computation circuit identifies and exploits common case computations during the design process for reducing power consumption.
机译:本发明提出了基于普通案例计算(CCC)的设计。一种具有降低的功耗的计算电路,所述计算电路具有多个组件。这些组件包括通用电路,普通情况检测电路和普通情况执行电路。通用情况检测电路基于通用电路的主要输入的第一子集和内部变量的第一子集来检测通用情况的发生,并且通用情况执行电路计算通用电路的主要输出的子集基于通用电路的主要输入的第二子集和通用电路的内部变量的第二子集。主要输入的第一子集和内部变量的第一子集可以分别与主要变量的第二子集和内部变量的第二子集相同。普通情况计算电路在设计过程中识别并利用普通情况计算以减少功耗。

著录项

  • 公开/公告号US6275969B1

    专利类型

  • 公开/公告日2001-08-14

    原文格式PDF

  • 申请/专利权人 NEC USA INC.;

    申请/专利号US19990328896

  • 发明设计人 GANESH LAKSHMINARAYANA;ANAND RAGHUNATHAN;

    申请日1999-06-09

  • 分类号G06F175/00;

  • 国家 US

  • 入库时间 2022-08-22 01:03:32

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