HIGH-SPEED MODULAR MULTIPLIERS BASED ON A NEW BINARY SIGNED-DIGIT ADDER TREE STRUCTURE

摘要

Modular multiplication is a very important arithmetic operation in residue-based real-time computing systems. In this paper, we present multipliers using a modified binary tree of the modulo m signed-digit (SD) number adders where m = 2~n+ μ(μ = ±1,0). To simplify the residue SD adder, new addition rules are used for generating the intermediate sum and carry with an 1-bit binary encoded number representation. By using the new encoding method, the proposed residue addition requires less hardware and shorter delay time than previous one. A modulo m multiplier can be implemented by a binary modulo m adder tree which has a depth of log_2 n. In order to introduce a binary SD adder tree with the new addition rules, two novel modulo m adders have been proposed in this paper. Finally, the evaluation apparently shows that the proposed two kinds of modulo m adders are performed more efficiency by comparing with the modulo SD adder which is mentioned in our previous work, and a new binary SD adder tree structure has been proposed.