Modified Wallace-Tree adder for high-speed binary multiplier, structure and method

摘要

A carry-save adder for use in a binary multiplier with a reduced number of full adder stages. The carry-save adder is for summing columns of binary data and is implemented with a plurality of one-bit and two-bit full adders. The one-bit and two-bit full adders are configured in a plurality of interconnected modified Wallace-Tree adders, each modified Wallace-Tree adder for summing binary data bits from one or more columns and generating a partial sum and a partial carry. Each modified Wallace- Tree adder has a plurality of stages comprising a combination of one-bit and two-bit full adders for reducing the number of the binary data bits, the last stage comprising a single one-bit full adder for generating the partial sum and partial carry results. A plurality of conductors interconnects the stages of each modified Wallace-Tree adder with stages in the same modified Wallace-Tree adder and with stages in other modified Wallace-Tree adders.