Length Effect of Spacer-Type Storage Node in High-Density 2-bit/Cell Silicon-Oxide-Nitride-Oxide-Silicon NOR Flash Cell Based on Recessed Channel Structure

摘要

We characterized length effect of the spacer-type storage node in 2-bit/cell silicon-oxide-nitride-oxide-silicon (SONOS) flash memory device with recessed channel structure for 50 nm non-volatile memory (NVM) technologies. A proposed memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region. Device which has the charge storage length of 40 nm shown better △ V_(th) and V_(th) margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100nm. It was shown that peak of trapped charge density was observed near ～10nm below the source/ drain junction. Especially, in case of given read bias for forward or reverse read, the sensing current was more stable with shorter length of the storage layer.