Threshold Voltage Modeling of Fully Depleted Nanoscale Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistors with Doped Channel by Considering Drain Bias

摘要

The threshold voltage (V_(th)) was modeled in a simple closed form by considering drain bias (V_(DS)) for fully depleted (FD) symmetric double-gate (DG) n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with doped short channels. The V_(th), model using only two parameters (D_G and D_D) is based on V_(th0) (V_(th) at low V_(DS)), and derived from the diffusion current of doped DG MOSFETs that was modeled using surface potential (Φ_s). D_G and D_D are parameters for considering the gate bias (V_(GS)) dependence and V_(DS) dependence, respectively, in the diffusion current model. Our compact V_(th) model predicted the threshold voltage behavior by considering V_(DS) more accurately than the constant current (CC) method down to a channel length (L) of 30 nm.