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首页> 外文期刊>Japanese journal of applied physics >Effect of DC Bias Voltage on the Characteristics of Low Temperature Silicon-Nitride Films Deposited by Internal Linear Antenna Inductively Coupled Plasma Source
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Effect of DC Bias Voltage on the Characteristics of Low Temperature Silicon-Nitride Films Deposited by Internal Linear Antenna Inductively Coupled Plasma Source

机译:直流偏置电压对内部线性天线电感耦合等离子体源沉积低温氮化硅薄膜特性的影响

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摘要

The characteristics of silicon-nitride deposited at the temperature lower than 100 ℃ using an internal linear-type inductively coupled plasma were investigated as functions of the NH_3/SiH_4 ratio and ion bombardment energy applied to the substrate (dc bias voltage) for use as the gate dielectric material of flexible display devices. Decreasing the NH_3/SiH_4 ratio to 2 and increasing the dc bias voltage to .150 V decreased the Si-O bonding and increased the Si-N bonding, resulting in a more nitrogen-rich SiN_x thin film. In addition, the capacitance-voltage measurement of the metal-insulator-semiconductor devices fabricated with the SiN_x thin film deposited at various dc bias voltages showed a hysteresis curve in the cyclic voltage measurement and the increase of the dc bias voltage with decreasing hysteresis voltage. The interface trap density measured at a dc bias voltage of .150V and NH_3/SiH_4 ratio of 2 showed the lowest interface trap charge density of about 2 × 10~(11) cm~(-2). Under these conditions, the dielectric constant was as high as 7.2.
机译:研究了使用内部线性电感耦合等离子体在低于100℃的温度下沉积的氮化硅的特性,该特性与NH_3 / SiH_4比和施加到基板上的离子轰击能量(直流偏置电压)的函数有关,柔性显示装置的栅极介电材料。将NH_3 / SiH_4的比值减小到2并将dc偏置电压增加到.150 V,可以降低Si-O键并增加Si-N键,从而得到更富氮的SiN_x薄膜。另外,用在各种直流偏置电压下沉积的SiN_x薄膜制造的金属-绝缘体-半导体器件的电容-电压测量在循环电压测量中显示出磁滞曲线,并且随着偏置电压的降低,直流偏置电压的增加。在.150V直流偏置电压和NH_3 / SiH_4比为2的条件下测得的界面陷阱密度显示最低的界面陷阱电荷密度约为2×10〜(11)cm〜(-2)。在这些条件下,介电常数高达7.2。

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  • 来源
    《Japanese journal of applied physics》 |2010年第5issue1期|P.056505.1-056505.5|共5页
  • 作者单位

    Department of Advanced Materials Engineering, Sungkyunkwan University, Suwon 440-746, Korea;

    Department of Advanced Materials Engineering, Sungkyunkwan University, Suwon 440-746, Korea;

    Department of Advanced Materials Engineering, Sungkyunkwan University, Suwon 440-746, Korea;

    Department of Advanced Materials Engineering, Sungkyunkwan University, Suwon 440-746, Korea SKKU Advanced Institute of Nano Technology (SAINT), Sungkyunkwan University, Suwon 440-746, Korea The National Program for Tera-Level Nanodevices, Seoul 136-791, Korea;

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