Null Detector Circuit Design Scheme for Detecting Defective AC-Coupled Capacitors in Differential Signaling

摘要

This paper presents a novel method for detecting defective ac-coupling capacitors in high-speed differential signaling connections by designing a circuit with null detectors at the differential receiver. The design parameters of selecting the null ranges in the receiver buffer are proposed to efficiently detect the voltage droop that creates erroneous jitter. The null detectors in the proposed method enable the use of a lower test signal speed than the mission data rate at differential connections to detect defective capacitors. The proposed design method of null detectors combines four design and test factors, namely, regular null, voltage doubling, fail–safe, and defect sensitization, to determine the stretched null used for test purposes. The null-detection scheme has been implemented and verified in the design using a regular current-mode logic (CML) differential buffer in the 0.18- $muhbox{m}$ complementary metal–oxide–semiconductor (CMOS) process. The detection capability of the proposed method to check for traditional defects with the same null detector is also demonstrated through SPICE-based fault simulations. The proposed method is also verified with the board developed for parameter measurements. The parameters proposed in this paper showed excellent agreement among calculated, simulated, and measured values. In particular, measured parameters showed strong closeness up to 99% to its calculated values.