Electrical linewidth test structures patterned in (100)silicon-on-insulator for use as CD standards

摘要

Electrical test structures known as cross-bridge resistors havenbeen patterned in (100) epitaxial silicon material that was grown onnBonded and Etched-back Silicon-On-Insulator (BESOI) substrates. Thencritical dimensions (CDs) of a selection of their reference segmentsnhave been measured electrically, by scanning-electron microscopy (SEM),nand by lattice-plane counting. The lattice-plane counting is performednon phase-contrast images of the cross sections of the reference segmentsnthat are produced by high-resolution transmission-electron microscopyn(HRTEM). The reference-segment features were aligned with (110)ndirections in the BESOI surface material. They were defined by a siliconnmicromachining process that resulted in their sidewalls being nearlynatomically planar and smooth and inclined at 54.737° to the surfacen(100) plane of the substrate. SEM, HRTEM, and electrical CD (ECD)nlinewidth measurements have been made on features of various drawnndimensions on the same substrate to investigate the feasibility of a CDntraceability path that combines the low cost, robustness, andnrepeatability of ECD metrology and the absolute measurement of the HRTEMnlattice-plane counting technique. Other novel aspects of the (100)nsilicon-on-insulator (SOI) implementation that are reported here are thenECD test-structure architecture and the making of lattice-plane countsnfrom cross-sectional HRTEM imaging of the reference features. This paperndescribes the design details and the fabrication of the cross-bridgenresistor test structure. The long-term goal is to develop a techniquenfor the determination of the absolute dimensions of the trapezoidalncross sections of the cross-bridge resistors' reference segments, as anprelude to making them available for dimensional reference applications