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Test sequences to achieve high defect coverage for synchronous sequential circuits

机译:测试序列可实现同步时序电路的高缺陷覆盖率

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Test sets that detect each stuck-at fault n<1 times (called n-detection stuck-at test sets) were shown to be effective in achieving high defect coverages. In addition, a pseudofunctional fault model defined before was shown to result in test sets having similar defect coverages. Previous studies of n-detection stuck-at test sets and pseudofunctional test sets were for combinational circuits, In this paper, we study detection stuck-at test sequences and pseudofunctional test sequences for synchronous sequential circuits. Considering stuck-at faults, we propose five definitions of the number of detections achieved by a test sequence. These definitions lead to five different definitions of n-detection stuck at test sequences. We discuss the effects of these definitions on fault-simulation and test-generation procedures and present experimental results for benchmark circuits to evaluate their relative effectiveness. The experimental results indicate the usefulness of the simplest definition in generating test sequences that achieve improved defect coverages. We also describe a pseudofunctional fault model that extends previous definitions. We describe fault-simulation and test-generation methods for this model and give experimental data to evaluate its effectiveness. The results indicate that this model too can be used to generate test sequences with improved defect coverage. Its advantages and disadvantages compared to the n-detection stuck-at model are also considered.
机译:测试结果表明,将每个卡住的故障检测到的n <1次测试集(称为n-检测卡住的测试集)可有效实现较高的缺陷覆盖率。另外,先前定义的伪功能故障模型显示出导致具有相似缺陷覆盖率的测试集。先前对n检测固定测试集​​和伪功能测试集的研究是针对组合电路的,在本文中,我们研究了同步时序电路的检测固定测试序列和伪功能测试序列。考虑到卡住的故障,我们提出了由测试序列实现的检测次数的五个定义。这些定义导致卡在测试序列上的n检测的五个不同定义。我们讨论了这些定义对故障仿真和测试生成过程的影响,并提供了基准电路的实验结果以评估其相对有效性。实验结果表明,最简单的定义在生成可改善缺陷覆盖率的测试序列中很有用。我们还描述了扩展先前定义的伪功能故障模型。我们描述了该模型的故障仿真和测试生成方法,并提供了实验数据以评估其有效性。结果表明,该模型也可以用于生成具有改善的缺陷覆盖率的测试序列。还考虑了与n检测卡死模型相比的优缺点。

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