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首页> 外文期刊>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems >Energy-Aware Clock-Frequency Assignment in Microprocessors and Memory Devices for Dynamic Voltage Scaling
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Energy-Aware Clock-Frequency Assignment in Microprocessors and Memory Devices for Dynamic Voltage Scaling

机译:用于动态电压缩放的微处理器和存储设备中的节能时钟频率分配

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Dynamic supply-voltage scaling (DVS) can reduce the energy consumption of microprocessors, but most DVS schemes only scale the clock frequency of the microprocessor and ignore the memory system. In this paper, we show how more energy can be saved by changing the clock frequency of the memory as well as that of the microprocessor in a coordinated fashion. The contributions of this paper include: 1) consideration of both the energy and access time of the memory; 2) derivation of a mathematical formulation of a system-wide energy model as a function of the clock frequencies of the microprocessor and memory; 3) derivation of analytic solutions of system-wide energy-optimal clock-frequency pairs for the microprocessor and the memory, and, finally, 4) extension of the frequency-assignment technique to handle discrete voltages and frequencies. Cycle-accurate system-level energy simulation shows that the proposed scheme can save up to 50% more energy than previous DVS schemes. Our approach can also be applied to other synchronous peripheral devices
机译:动态电源电压缩放(DVS)可以减少微处理器的能耗,但是大多数DVS方案仅缩放微处理器的时钟频率,而忽略存储系统。在本文中,我们展示了如何通过以协调的方式更改存储器和微处理器的时钟频率来节省更多的能量。本文的贡献包括:1)同时考虑存储器的能量和访问时间; 2)根据微处理器和存储器的时钟频率得出系统范围能量模型的数学公式; 3)推导用于微处理器和存储器的全系统能量最佳时钟频率对的解析解,最后,4)扩展频率分配技术以处理离散电压和频率。精确到周期的系统级能源仿真表明,与以前的DVS方案相比,该方案可节省多达50%的能源。我们的方法也可以应用于其他同步外围设备

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