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A comparison of modulator networks for high-order oversampled Sigma Delta analog-to-digital converters

机译:高阶过采样Sigma Delta模数转换器的调制器网络比较

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After a discussion of the practical problem of comparing the relative performance of all known high-order modulator networks with respect to resolution, stability, input range, component sensitivities, finite amplifier gains, and bandwidths, equations are derived and verified by computer simulation that relate reduction in signal-to-noise ratio to component mismatch and finite amplifier gain, allowing designers to choose the best network for a particular application. A third-order, sigma-delta ( Sigma - Delta ) oversampled analog-to-digital (A/D) modulator network is presented. It shows improved performance in most respects over previous modulators. Although its theoretical performance in the absence of circuit nonidealities is below that of the triple first-order cascade network, when practical impairments such as finite amplifier gains and component mismatch are considered, it displays superior performance. Gain and offset errors are potentially lower for this network due to its ability to use a single capacitor for input signal and D/A feedback. A markedly reduced sensitivity to nonidealities for this network implies that monolithic circuits could be manufactured with better processing yields and hence lower unit costs.
机译:在讨论了比较所有已知高阶调制器网络相对于分辨率,稳定性,输入范围,组件灵敏度,有限放大器增益和带宽的相对性能的实际问题之后,通过计算机仿真得出并验证了相关的方程式降低了信噪比,组件失配和有限的放大器增益,使设计人员可以为特定应用选择最佳网络。提出了一个三阶Σ-Δ(Sigma-Delta)过采样的模数(A / D)调制器网络。与以前的调制器相比,它在大多数方面都表现出改进的性能。尽管在没有电路非理想性的情况下其理论性能低于三阶一阶级联网络的理论性能,但当考虑到诸如放大器的有限增益和组件失配之类的实际障碍时,它仍具有出色的性能。由于该网络可以使用单个电容器输入信号和D / A反馈,因此其增益和失调误差可能会更低。该网络对非理想性的敏感度明显降低,这意味着可以以更高的处理良率并因此降低单位成本来制造单片电路。

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