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Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells

机译:减少NBTI和工艺变化对6T SRAM单元影响的自适应人体偏置

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摘要

Reliability and variability have become big design challenges facing submicrometer SRAM designers. A low area overhead adaptive body bias (ABB) circuit is proposed in this paper to compensate for NBTI aging and process variations to improve the SRAM reliability and yield. The proposed ABB circuit consists of a threshold voltage sensing circuit and an on-chip analog controller. Postlayout simulation results, referring to an industrial hardware-calibrated STMicroelectronics 65 nm CMOS technology transistor model, are presented. The transistor model contains process variations and NBTI aging model cards, which are declared by STMicroelectronics to be silicon verified. Cadence RelXpert, Virtuoso Spectre, and Virtuoso UltraSim tools are used to estimate the NBTI aging and process variations impacts on the SRAM array. These results show that the proposed ABB compensates effectively for NBTI aging and process variations. For example, the proposed ABB reduces the read failure probability from 0.32% to 0.05% and the SNM degradation from 10.9% to 2.6% at 10 years aging time. In addition, the proposed ABB enhances the soft errors immunity of the SRAM cell by reducing the critical charge degradation from 12.7% to 3.4% at 10 years aging time.
机译:可靠性和可变性已成为亚微米SRAM设计人员面临的重大设计挑战。本文提出了一种低面积开销的自适应主体偏置(ABB)电路,以补偿NBTI老化和工艺变化,从而提高SRAM的可靠性和良率。拟议的ABB电路由一个阈值电压检测电路和一个片上模拟控制器组成。给出了后布局仿真结果,并参考了经过工业硬件校准的STMicroelectronics 65 nm CMOS技术晶体管模型。晶体管模型包含工艺变化和NBTI老化模型卡,STMicroelectronics声明这些卡经硅验证。 Cadence RelXpert,Virtuoso Spectre和Virtuoso UltraSim工具用于估计NBTI老化以及工艺变化对SRAM阵列的影响。这些结果表明,提出的ABB有效补偿了NBTI老化和工艺变化。例如,建议的ABB在10年的老化时间下将读取失败的可能性从0.32%降低到0.05%,而SNM的降低从10.9%降低到2.6%。此外,通过将老化10年后的临界电荷降解率从12.7%降低到3.4%,提出的ABB增强了SRAM单元的抗软错误能力。

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