A CMOS Instrumentation Amplifier With 90-dB CMRR at 2-MHz Using Capacitive Neutralization: Analysis, Design Considerations, and Implementation

摘要

The benefits of using “current feedback” in instrumentation amplifier (IA) design are well known. In this paper, we analyze the mismatch mechanisms, both random and systematic types, which influence the common-mode rejection ratio (CMRR) performance of the local current feedback IA topology. We derive analytical expressions for the common-mode gain frequency response due to random mismatches (transconductance, drain-source conductance and parasitic capacitance) and verify the integrity of the analysis through simulation. To address the systematic mismatch in the drain capacitance of the input pair transistors, we employ capacitive neutralization and verify its effectiveness in practice from the fabricated IA chip samples in a 0.35-$mu hbox{m}$ CMOS process technology. The measured average common-mode gain improvement for the 20 fabricated samples employing our neutralization technique is about 20 dB at 2 MHz ($-$ 3 dB bandwidth). When taking into account the differential gain response (33.7 dB), the average CMRR of the neutralized IA at 2 MHz exceeds 90 dB. The IA occupies an area of 0.068 $hbox{mm}^{2}$ and dissipates 0.85 mW from a 3-V power supply. The circuit is intended for a wideband bioimpedance spectroscopy application.