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Frequency Synthesizer With Dual Loop Frequency and Gain Calibration

机译:具有双环路频率和增益校准的频率合成器

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A 3600-MHz phase-locked loop based frequency synthesizer for UMTS applications has been developed in 0.18 $mu$ m CMOS. It incorporates a VCO frequency and loop-gain calibration technique that allows an integrated VCO frequency tuning range of 28% and a low VCO gain ($K_{rm VCO}$ of 30 MHz/V. The loop-gain calibration can compensate for not only variations in VCO gain and divider modulus, but also charge-pump current and loop filter capacitance to an accuracy of 5%. The PLL settles in 150 $mu$s including frequency and gain calibrations. No switches are used in the loop filter. The output phase noise at 1-MHz offset is ${-}123$ dBc/Hz and the integrated phase error (1 kHz–2 MHz) is 1.26 $^{circ}$.
机译:一种用于UMTS应用的3600-MHz锁相环频率合成器已经在0.18μmCMOS中开发。它结合了VCO频率和环路增益校准技术,可实现28%的集成VCO频率调谐范围和低VCO增益($ K_ {rm VCO} $为30 MHz / V。环路增益校准可以补偿不PLL的电压变化率仅为VCO增益和分频器模量的变化,而且电荷泵电流和环路滤波器电容的精度达到5%,PLL的稳定频率为150μs,包括频率和增益校准,环路滤波器中未使用任何开关。在1 MHz偏移处的输出相位噪声为$ {-} 123 $ dBc / Hz,积分相位误差(1 kHz–2 MHz)为1.26 $ ^ {circ} $。

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