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Hybrid CMOS Rectifier Based on Synergistic RF-Piezoelectric Energy Scavenging

机译:基于协同RF-压电能量清除的混合CMOS整流器

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This paper presents a novel CMOS hybrid rectifier that can simultaneously and efficiently scavenge energy from a low-amplitude radio-frequency (RF) signal and a low-frequency, low-energy signal from a piezoelectric (PZT) transducer. The piezoelectric signal is used for biasing a complimentary, cross-coupled rectifier (CCCR) chain to an operating point such that the RF signal energy can be efficiently harvested, even if its amplitude is well below the threshold voltage of the rectifier transistors. The device sizes for the proposed design have been optimized to achieve the maximum DC output voltage and the proposed design is shown to effectively eliminate dead-zones in the rectifier response. The measurement results show that a 6-stage hybrid rectifier (HR) can generate up to 1 V DC output voltage at a load current of 3 when a 300 mV peak-to-peak, 13.56 MHz RF signal is applied in conjunction with a 10 KHz, 2 V piezoelectric signal. Using measured results from prototypes fabricated in a 90 nm CMOS process, the proposed HR is shown to yield a significant improvement in power conversion efficiency (PCE) for low levels of input power when compared to a conventional CCCR that has been implemented on the same die.
机译:本文提出了一种新颖的CMOS混合整流器,该整流器可以同时有效地清除来自低振幅射频(RF)信号和来自压电(PZT)传感器的低频,低能量信号中的能量。压电信号用于将互补的交叉耦合整流器(CCCR)链偏置到一个工作点,从而即使振幅大大低于整流器晶体管的阈值电压,也可以有效地收集RF信号能量。拟议设计的器件尺寸已得到优化,以实现最大的直流输出电压,并且拟议设计显示可有效消除整流器响应中的死区。测量结果表明,当300 mV峰峰值,13.56 MHz射频信号与10 m射频信号一起施加时,六级混合整流器(HR)可以在3的负载电流下产生高达1 V的直流输出电压。 KHz,2 V压电信号。使用在90 nm CMOS工艺中制造的原型的测量结果,与在同一芯片上实施的常规CCCR相比,对于较低的输入功率,建议的HR在功率转换效率(PCE)方面得到了显着改善。 。

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