首页> 外文期刊>IEEE transactions on circuits and systems . I , Regular papers >Advanced Bit Flip Concatenates BCH Code Demonstrates 0.93% Correctable BER and Faster Decoding on (36 864, 32 768) Emerging Memories
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Advanced Bit Flip Concatenates BCH Code Demonstrates 0.93% Correctable BER and Faster Decoding on (36 864, 32 768) Emerging Memories

机译:高级位翻转连接BCH代码可在0.936%的可纠正BER和更快的解码速度下对(36 864,32 768)新兴存储进行解码

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摘要

Bose-Chaudhuri-Hocquenghem (BCH) and low-density-parity-check (LDPC) are two popular error correcting codes for non-volatile memories. However, the BCH has limited error correction ability, while the LDPC requires multiple sensing operations per read. In this paper, an advanced bit flip (ABF) scheme is proposed to obtain high-correctable raw bit error rate (BER), fast decoding, and one sensing per read, simultaneously. During write, first, the ABF uses data mapping to correct major program errors. Then, the BCH is used to correct the remaining errors. The performance of concatenated ABF + BCH is calculated by using 108writes data from a nano-random access memory array. On 32 768 user data bits, ABF + BCH reduces 54% parity size and 17% decoding latency compared with only using BCH. Furthermore, ABF + BCH performances are calculated and analyzed statistically on a hypothetical memory array with binominal error distribution. By using fixed 512 bytes parity, ABF + BCH obtains 0.93% correctable raw BER when set + retention BER is 0.1%. Moreover, ABF + BCH shows less decoding latency than only using BCH.
机译:Bose-Chaudhuri-Hocquenghem(BCH)和低密度奇偶校验(LDPC)是非易失性存储器的两种流行的纠错码。但是,BCH具有有限的纠错能力,而LDPC每次读取需要多次感测操作。本文提出了一种先进的位翻转(ABF)方案,以同时获得高可校正的原始位误码率(BER),快速解码和每次读取一个感应。在写入过程中,首先,ABF使用数据映射来纠正主要程序错误。然后,使用BCH纠正剩余的错误。通过使用10 n 8 n写入来自纳米随机存取存储器阵列的数据。与仅使用BCH相比,在32768个用户数据位上,ABF + BCH减少了54%的奇偶校验大小和17%的解码延迟。此外,在具有二项式误差分布的假设存储阵列上,对ABF + BCH性能进行了计算和统计分析。通过使用固定的512字节奇偶校验,当设置+保留BER为0.1%时,ABF + BCH可获得0.93%的可校正原始BER。此外,与仅使用BCH相比,ABF + BCH的解码延迟更短。

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