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Leveraging Sharing in Second Level Translation-Lookaside Buffers for Chip Multiprocessors

机译:利用芯片多处理器的二级转换后备缓冲器中的共享

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摘要

Traversing page table during virtual to physical address translation causes significant pipeline stalls when misses occur in the translation-lookaside buffer (TLB). To mitigate this penalty, we propose a fast, scalable, multi-level TLB organization that leverages page sharing behaviors and performs efficient TLB entry placement. Our proposed partial sharing TLB (PSTLB) reduces TLB misses by around 60%. PSTLB also improves TLB performance by nearly 40% compared to traditional private TLBs and 17% over the state of the art scalable TLB proposal.
机译:在虚拟后备地址转换过程中遍历页表会导致大量流水线停顿,而转换后备缓冲区(TLB)中会发生未命中。为了减轻这种损失,我们提出了一种快速,可扩展的多层TLB组织,该组织利用页面共享行为并执行有效的TLB条目放置。我们建议的部分共享TLB(PSTLB)可以将TLB丢失率降低约60%。与传统的私有TLB相比,PSTLB还使TLB性能提高了近40%,比最新的可扩展TLB提议提高了17%。

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