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首页> 外文期刊>IEEE Transactions on Electron Devices >Supply voltage design tradeoffs between speed and NMOSFET reliability of half-micrometer BiCMOS gates
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Supply voltage design tradeoffs between speed and NMOSFET reliability of half-micrometer BiCMOS gates

机译:在半微米BiCMOS栅极的速度和NMOSFET可靠性之间进行电源电压设计折衷

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摘要

Voltage supply scaling for a BiCMOS gate was investigated experimentally and analytically. For half-micrometer technology, the supply voltage design tradeoffs between propagation delay and NMOSFET reliability were studied. It was found that the minimum BiCMOS operating voltage ranges from 2.5 to 3.0 V. This minimum can be explained by the sum of twice the base-emitter potential and the NMOSFET threshold voltage, due to the emitter grounded Bi-MOS structure of the BiCMOS gate. As a result, 3.3-V operation is inherently marginal for BiCMOS gates. On the other hand, NMOS reliability in the BiCMOS gate is drastically improved because effective drain voltage is reduced by the base-emitter potential. Thus, NMOSFETs with a channel length shorter by more than 0.2 mu m can be used, and this ensures reliable operation of BiCMOS gates at 5 V. In terms of the tradeoffs between gate speed and NMOS reliability, it is verified that BiCMOS gates offer the highest speed in half-micrometer design.
机译:通过实验和分析研究了BiCMOS栅极的电源电压定标。对于半微米技术,研究了传播延迟和NMOSFET可靠性之间的电源电压设计折衷。发现最低BiCMOS工作电压范围为2.5至3.0V。由于BiCMOS栅极的发射极接地的Bi-MOS结构,该最小值可由基极-发射极电势和NMOSFET阈值电压的两倍之和来解释。 。结果,对于BiCMOS栅极,3.3 V工作本来就是边缘的。另一方面,由于基极-发射极电位降低了有效漏极电压,因此大大提高了BiCMOS栅极中的NMOS可靠性。因此,可以使用沟道长度短于0.2μm的NMOSFET,从而确保BiCMOS栅极在5 V电压下可靠运行。就栅极速度和NMOS可靠性之间的权衡而言,已证明BiCMOS栅极具有以下优点:半微米设计的最高速度。

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