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Process and device optimization of an analog complementary bipolar IC technology with 5.5-GHz f/sub T/ pnp transistors

机译:具有5.5 GHz f / sub T / pnp晶体管的模拟互补双极IC技术的工艺和器件优化

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An analog complementary bipolar IC process has been developed featuring 9.0-GHz f/sub T/ npn and 5.5-GHz f/sub T/ pnp transistors. Process conditions for emitter, base, and collector of pnp transistors are optimized in order to achieve the best performance tradeoff between current gain, Early voltage, and cutoff frequency. With the optimized process conditions, the H/sub FE//spl times/V/sub A/ of pnp transistors is 350 V with f/sub T/ of 5.5 GHz and f/sub max/ of 8.5 GHz. These high performance pnp transistors have been integrated into an existing 9.0-GHz f/sub T/ npn bipolar process without introducing excessive additional process complexity and manufacturing costs. In addition, Schottky diodes, p-channel junction FET's and laser wafer trimmable precision NiCr resistors have been integrated into the process to enhance analog circuit design capability.
机译:已经开发出具有9.0 GHz f / sub T / pnp和5.5 GHz f / sub T / pnp晶体管的模拟互补双极IC工艺。对pnp晶体管的发射极,基极和集电极的工艺条件进行了优化,以便在电流增益,早期电压和截止频率之间实现最佳性能折衷。在优化的工艺条件下,pnp晶体管的H / sub FE // spl次/ V / sub A /为350 V,f / sub T /为5.5 GHz,f / sub max /为8.5 GHz。这些高性能pnp晶体管已集成到现有的9.0 GHz f / sub T / npn双极工艺中,而不会引起额外的额外工艺复杂性和制造成本。此外,工艺中还集成了肖特基二极管,p沟道结FET和激光晶圆可微调的精密NiCr电阻,以增强模拟电路设计能力。

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