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Thermionic-emission-based barrier height analysis for precise estimation of charge handling capacity in CCD registers

机译:基于热电子发射的势垒高度分析,可精确估算CCD寄存器中的电荷处理能力

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In designing charge-coupled device (CCD) image sensors, it is essential to be able to estimate charge handling capacity. Because electrons have thermal energy, storing electrons in a well in a CCD register requires a sufficient potential barrier height to keep them from overflowing. As the quantity of electrons in a well depends on the barrier height, knowledge of this height is indispensable for precise estimation of the charge handling capacity. The authors have derived an expression describing the barrier height on the basis of thermionic emission, assuming current coefficient I/sub 0/ and well capacitance C. We derived the current coefficient I/sub 0/ and well capacitance C with computer simulations and from the results estimate the magnitude of the barrier height for a typical Vertical-CCD (V-CCD) structure. We have also examined barrier height dependence on structural parameters. Finally, we determined the barrier heights experimentally, and our results support the values obtained in the simulation.
机译:在设计电荷耦合器件(CCD)图像传感器时,必须能够估计电荷处理能力。由于电子具有热能,因此将电子存储在CCD寄存器的阱中需要足够的势垒高度,以防止其溢出。由于阱中的电子数量取决于势垒高度,因此对于精确估计电荷处理能力而言,了解该高度是必不可少的。作者推导了一个基于热电子发射描述势垒高度的表达式,假设电流系数为I / sub 0 /和阱电容C。我们通过计算机模拟得出了电流系数I / sub 0 /和阱电容C。结果估计了典型垂直CCD(V-CCD)结构的势垒高度的大小。我们还检查了障碍物高度对结构参数的依赖性。最后,我们通过实验确定了势垒高度,我们的结果支持了在仿真中获得的值。

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