Ge p-MOSFETs With Scaled ALD $hbox{La}_{2} hbox{O}_{3}/hbox{ZrO}_{2}$ Gate Dielectrics

摘要

Dielectric thin films of $hbox{La}_{2}hbox{O}_{3}/hbox{ZrO}_{2}$ deposited by atomic layer deposition (ALD) are investigated to be employed in Ge Schottky barrier p-MOSFETs. $hbox{La}_{2}hbox{O}_{3}$ is used as a thin passivation layer and is capped by atomic-layer-deposited $hbox{ZrO}_{2}$ as a gate dielectric. As the gate contact TiN capped by W is applied, midgap-level trap densities of $sim!!hbox{3}{-}hbox{4} times hbox{10}^{12} hbox{eV}^{-1} hbox{cm}^{-2}$ and subtreshold slopes down to 115–120 mV/dec are achieved. The devices show negative threshold voltages of $-$0.5 to $-$0.6 V, as well as peak hole mobility values of $sim$50–75 $ hbox{cm}^{2}/hbox{V} cdot hbox{s}$. Equivalent oxide thickness (EOT) is reduced to 0.96 nm upon postmetallization annealing without degrading the interface properties. The results show the scaling potential of the ALD $hbox{La}_{2}hbox{O}_{3}$ interlayer capped with $hbox{ZrO}_{2}$ gate dielectrics for the integration into sub-1-nm EOT Ge p-MOSFET devices.