Gate-First Integration of Tunable Work Function Metal Gates of Different Thicknesses Into High- /Metal Gates CMOS FinFETs for Multi- Engineering

摘要

Gate-first integration of tunable work function metal gates of different thicknesses (3–20 nm) into high-$k$/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages $(V_{rm Th})$ for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering $sim$ 40 mV/V), nearly symmetric $V_{rm Th}$, low $T_{rm inv}$ ($sim$ 1.4 nm), and high $I_{rm on} (sim!!hbox{780} muhbox{A}/mu hbox{m})$ for N/PMOS without any intentional strain enhancement.