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Electrical Characteristic Investigation on a Novel Double-Well Isolation Structure in 600-V-Class High-Voltage Integrated Circuits

机译:600V级高压集成电路中新型双阱隔离结构的电特性研究

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In order to achieve a high breakdown voltage (BV) and to avoid local breakdown in high-voltage integrated circuits, a novel double-well (DW) high-voltage divided reduced surface field (RESURF) isolation structure featuring two slender N-well regions located at $hbox{N}^{-}$-well region is proposed for the first time. The breakdown mechanisms are investigated by theoretical analysis and experimental measurements. In the high-voltage blocking state, the N-well regions can efficiently prevent the P-well region from depleting with the high-side region, so as to maintain the charge balance of the novel isolation structure, which leads to an increase in the BV from 656 V in the conventional isolation structure to 760 V in the proposed structure. The dependence of the electrical characteristics of the isolation on the structure parameters has been analyzed in detail. The novel DW divided RESURF structure has been fabricated in 0.5- $muhbox{m}$ bipolar–CMOS–DMOS technology, which has verified the feasibility and validity of the new concept.
机译:为了实现高击穿电压(BV)并避免高压集成电路中的局部击穿,一种新颖的双阱(DW)高压划分的减小表面场(RESURF)隔离结构具有两个细长的N阱区域首次建议位于$ hbox {N} ^ {-} $-井区域。通过理论分析和实验测量研究了故障机理。在高压阻挡状态下,N阱区域可以有效地防止P阱区域与高侧区域一起耗尽,从而维持新颖的隔离结构的电荷平衡,从而导致绝缘层的增加。 BV从常规隔离结构中的656 V到建议结构中的760V。详细分析了隔离器的电气特性对结构参数的依赖性。新型的DW分割RESURF结构已在0.5-muhbox {m} $双极CMOS-DMOS技术中制造,这证明了新概念的可行性和有效性。

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