Modeling of Threshold-Voltage Drift in Phase-Change Memory (PCM) Devices

摘要

The amorphous phase of the chalcogenide material in phase-change memory (PCM) devices is sensitive to temperature-activated crystallization and structural relaxation (SR). The latter leads to a change of device/material properties, such as the mobility band gap, the resistance, and the threshold voltage $V_{T}$ for threshold switching. In this paper, we present a $V_{T}$ drift model based on physical descriptions of the electrical transport, the threshold switching, and the SR. We introduce an analytical formula describing the relation between the drift slopes of resistance and $V_{T}$ via the subthreshold slope STS of the $I$– $V$ curve. A numerical model predicting the time evolution of $V_{T}$ for different programmed states in the PCM multilevel cell is finally presented and compared with experiments.