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Impact of Different Barrier Layers and Indium Content of the Channel on the Analog Performance of InGaAs MOSFETs

机译:沟道的不同阻挡层和铟含量对InGaAs MOSFET模拟性能的影响

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A barrier layer in an InGaAs MOSFET, which shows promise for high-performance logic applications due to enhanced electron mobility, is known to further improve the electron mobility. In this paper, a detailed investigation of the impact of different barrier layers on the analog performance of an InGaAs MOSFET is reported for the first time. The device parameters for analog applications, such as transconductance $(g_{m})$, transconductance-to-drive current ratio $(g_{m}/I_{rm DS})$, drain conductance $(g_{d})$, intrinsic gain $(g_{m}/g_{d})$, and unity-gain cutoff frequency $(f_{T})$ are studied with the help of a device simulator. A barrier layer is found to improve the analog performance of such a device in general; with a double-barrier layer showing the best performance. An investigation on the impact of varying the indium content in the channel on the analog performance of an InGaAs MOSFET with a double-barrier layer is also reported in this paper. It is found that a higher In content results in better analog performance of such devices.
机译:InGaAs MOSFET中的势垒层由于提高了电子迁移率而显示出对高性能逻辑应用的希望,已知该势垒层可进一步提高电子迁移率。本文首次报道了不同势垒层对InGaAs MOSFET模拟性能影响的详细研究。模拟应用的设备参数,例如跨导$(g_ {m})$,跨导驱动电流比$(g_ {m} / I_ {rm DS})$,漏极电导$(g_ {d})在设备模拟器的帮助下,对$,固有增益$(g_ {m} / g_ {d})$和单位增益截止频率$(f_ {T})$进行了研究。人们发现阻挡层通常可以改善这种设备的模拟性能。双层阻隔层显示出最佳性能。本文还报道了有关改变沟道中铟含量对具有双势垒层的InGaAs MOSFET模拟性能的影响的研究。发现较高的In含量导致这种器件的更好的模拟性能。

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