机译:通道堆叠NAND闪存中用于层选择的串选择晶体管的新编程方法
Inter-University Semiconductor Research Center, Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, South Korea;
Inter-University Semiconductor Research Center, Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, South Korea;
Inter-University Semiconductor Research Center, Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, South Korea;
Inter-University Semiconductor Research Center, Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, South Korea;
Inter-University Semiconductor Research Center, Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, South Korea;
Research and Development Division, SK Hynix Inc., Icheon, South Korea;
Research and Development Division, SK Hynix Inc., Icheon, South Korea;
Research and Development Division, SK Hynix Inc., Icheon, South Korea;
Inter-University Semiconductor Research Center, Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, South Korea;
Inter-University Semiconductor Research Center, Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, South Korea;
Decision support systems; Logic gates; Electric potential; Voltage measurement; Transistors; Computer architecture; Interference;
机译:多级操作选择层的通道堆叠NAND闪存程序扰动分析
机译:通道堆叠NAND闪存中用于层选择的串选晶体管的多级阈值电压设置方法
机译:具有捆绑位线和地选择晶体管的通道堆叠NAND闪存
机译:具有通过多级操作(LSM)选择层的通道堆叠NAND闪存
机译:使用NAND闪存的硬件安全原语
机译:铁电栅极场效应晶体管的最新进展及其在非易失性逻辑和FeNAND闪存中的应用
机译:具有高κ电荷诱捕层的通道堆叠NAND闪存,可用于高可扩展性