III-V Junctionless Gate-All-Around Nanowire MOSFETs for High Linearity Low Power Applications

摘要

III-V junctionless gate-all-around (GAA) nanowire MOSFETs (NWFETs) are experimentally demonstrated for the first time. Source/drain resistance and thermal budget are minimized by regrowth using metalorganic chemical vapor deposition instead of implantation. The fabricated short channel $(L_{g}=80~{rm nm})$ GaAs GAA NWFETs with extremely scaled NW width $(W_{rm NW}=9~{rm nm})$ exhibit excellent $g_{m}$ linearity at biases as low as 300 mV, characterized by the high third intercept point (2.6 dbm). The high linearity is insensitive to the bias conditions, which is favorable for low power applications.