InAs FinFETs With nm Fabricated Using a Top–Down Etch Process

摘要

We report the first demonstration of InAs FinFETs with fin width in the range 25–35 nm, formed by inductively coupled plasma etching. The channel comprises defect-free, lattice-matched InAs with fin height nm controlled by the use of an etch stop layer incorporated into the device heterostructure. For a gate length , peak transconductance is measured at V demonstrating that electron transport in InAs fins can match planar devices.