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Variation of interface trap level charge density within the bandgap of 4H-SiC with varying oxide thickness

机译:4H-SiC带隙内界面陷阱能级电荷密度随氧化物厚度的变化

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Interfacial characteristics of metal oxide-silicon carbide (MOSiC) structure with different thickness of SiO2, thermally grown in steam ambient on Si-face of 4H-SiC (0 0 0 1) substrate were investigated. Variations in interface trapped level density (Dit) was systematically studied employing high-low (H-L) frequency e???a€“e?‘‰ method. It was found that the distribution of Dit within the bandgap of 4H-SiC varied with oxide thickness. The calculated Dit value near the midgap of 4H-SiC remained almost stable for all oxide thicknesses in the range of 109 a€“1010 cm-2 eV-1. The Dit near the conduction band edge had been found to be of the order of 1011 cm-2 eV-1 for thicker oxides and for thinner oxides Dit was found to be the range of 1010 cm-2 eV-1. The process had direct relevance in the fabrication of MOS-based device structures.
机译:研究了在4H-SiC(0 0 0 1)衬底的Si面上在蒸汽环境中热生长的,具有不同SiO2厚度的金属氧化物-碳化硅(MOSiC)结构的界面特性。使用高-低(e-e)方法,系统地研究了界面俘获能级密度(Dit)的变化。发现4H-SiC带隙内Dit的分布随氧化物厚度而变化。对于在109 a-1010 cm-2 eV-1范围内的所有厚度的氧化物,在4H-SiC中带附近的计算得出的Dit值几乎保持稳定。对于较厚的氧化物,对于较薄的氧化物,发现在导带边缘附近的Dit约为1011 cm-2 eV-1。对Dit而言,发现Dit的范围为1010 cm-2 eV-1。该工艺与制造基于MOS的器件结构直接相关。

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