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Standby power reduction using dynamic standby control with voltage keeper

机译:使用带有电压保持器的动态待机控制来降低待机功耗

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This paper presents dynamic standby control (DSC) with voltage keeper for further standby power reduction. As compared to the reported DSC, the new modified DSC can be kept deeply cut-off with negative overdrive voltage as well. Besides, a bootstrapped voltage keeper directly recharges the boosted node of power gate, which prevents leakage current during the recharging period. However, total standby power includes power overhead from DSC. Tuning the recharging rate of the proposed DSC appropriately achieves energy-efficient standby power. As a result, our proposal shows that minimized standby current can be found by an appropriate recharging rate even in different PVT conditions. The design is implemented in 180 nm CMOS process. Measured results show that standby power is suppressed at 0.8 V. Minimum standby power of only 16 nw is achieved where the recharging rate is 10 kHz.
机译:本文提出了带有电压保持器的动态待机控制(DSC),以进一步降低待机功耗。与报告的DSC相比,新的改良DSC还可通过负的过驱动电压保持深度截止。此外,自举式电压保持器可直接对功率门的升压节点进行充电,从而可防止在充电期间泄漏电流。但是,总待机功率包括DSC的功率开销。适当调整建议的DSC的充电率可实现节能的待机功率。结果,我们的建议表明,即使在不同的PVT条件下,也可以通过适当的充电速率找到最小的待机电流。该设计以180 nm CMOS工艺实现。测量结果表明,待机功率被抑制为0.8V。在10 kHz的充电速率下,最小待机功率仅为16 nw。

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