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CLOCK-DWF: A Write-History-Aware Page Replacement Algorithm for Hybrid PCM and DRAM Memory Architectures

机译:CLOCK-DWF:用于混合PCM和DRAM存储器体系结构的写历史感知页面替换算法

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Phase change memory (PCM) has emerged as one of the most promising technologies to incorporate into the memory hierarchy of future computer systems. However, PCM has two critical weaknesses to substitute DRAM memory in its entirety. First, the number of write operations allowed to each PCM cell is limited. Second, write access time of PCM is about 6–10 times slower than that of DRAM. To cope with this situation, hybrid memory architectures that use a small amount of DRAM together with PCM have been suggested. In this paper, we present a new memory management technique for hybrid PCM and DRAM memory architecture that efficiently hides the slow write performance of PCM. Specifically, we aim to estimate future write references accurately and then absorb frequent memory writes into DRAM. To do this, we analyze the characteristics of memory write references and find two noticeable phenomena. First, using write history alone performs better than using both read and write history in estimating future write references. Second, the frequency characteristic is a better estimator than temporal locality in predicting future memory writes. Based on these two observations, we present a new page replacement algorithm called CLOCK-DWF (CLOCK with Dirty bits and Write Frequency) that significantly reduces the number of write operations that occur on PCM and also increases the lifespan of PCM memory.
机译:相变存储器(PCM)已经成为最有前途的技术之一,可以并入未来计算机系统的存储器层次结构中。但是,PCM有两个关键弱点,无法整体上替代DRAM存储器。首先,限制了每个PCM单元允许的写操作次数。其次,PCM的写访问时间比DRAM慢6到10倍。为了应对这种情况,已经提出了使用少量DRAM和PCM的混合存储架构。在本文中,我们提出了一种用于混合PCM和DRAM存储器体系结构的新存储器管理技术,该技术有效地掩盖了PCM的慢写入性能。具体来说,我们的目标是准确估计未来的写入参考,然后将频繁的存储器写入DRAM中。为此,我们分析了内存写引用的特征,并发现了两个值得注意的现象。首先,在估计将来的写引用时,单独使用写历史记录要比使用读和写历史记录更好。其次,在预测未来的内存写入时,频率特性比时间局部性更好。基于这两个观察结果,我们提出了一种新的页面替换算法,称为CLOCK-DWF(带有脏位和写入频率的CLOCK),该算法可以显着减少PCM上发生的写入操作的次数,并可以延长PCM内存的使用寿命。

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