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An Analytical Framework for Estimating Scale-Out and Scale-Up Power Efficiency of Heterogeneous Manycores

机译:估计异质核的横向扩展和纵向放大效率的分析框架

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Heterogeneous manycore architectures have shown to be highly promising to boost power efficiency through two independent ways: 1) enabling massive thread-level parallelism, called “scale-out” approach, and 2) enabling thread migration between heterogeneous cores, called “scale-up” approach. How to accurately model the profitability of power efficiency of the two ways, particularly in an analytical and computational-effective manner, is essential to reap the power efficiency of such architectures. We propose a comprehensive analytical model to predict the power efficiency from the two independent ways. Given power efficiency is measured by performance per watt, this model is composed of a performance and a power model. The performance model is built by two orthogonal functions and . Function describes the scale-out speedup from multithreading; function presents the scale-up speedup from core heterogeneity. Thus, the performance model can clearly capture the overall speedup of any multithreading and thread-to-core mapping strategies. The power model predicts the power of corresponding scale-out and scale-up configurations. It simultaneously captures the power variations caused by thread synchronization and thread migration between heterogeneous cores. We build both performance and power model in an- analytical way and keep the computational complexity in mind. This merit leads to a suit of comprehensive and low-complexity models for runtime management. These models are validated on large-scale heterogeneous manycore architecture with full-system simulations. For performance prediction, the average error is below 12 percent, lower than that of the state-of-the-art methods. For power prediction, the average error is 7.74 percent. On top of the models, we introduce two heuristic scheduling algorithms, performance-oriented MAX-P and power efficiency-oriented MAX-E, to demonstrate the usage of these models. The results show that MAX-P outperforms the state-of-the-art methods by 18 percent in performance averagely; MAX-E outperforms the baseline by 70 percent in power efficiency on average.
机译:异构多核体系结构已显示出极有希望通过两种独立的方式提高电源效率:1)支持大规模的线程级并行性,称为“横向扩展”方法; 2)支持异构内核之间的线程迁移,即“向上扩展” ”方法。如何准确地以两种方式(尤其是以分析和计算有效的方式)对功率效率的盈利能力进行建模,对于获得此类架构的功率效率至关重要。我们提出了一个综合的分析模型,可以通过两种独立的方式预测电源效率。给定功率效率是通过每瓦性能来衡量的,该模型由性能和功率模型组成。该性能模型是由两个正交函数建立的。函数描述了多线程的横向扩展速度。函数提供了从核心异质性到纵向扩展的加速。因此,性能模型可以清楚地捕获任何多线程和线程到核心映射策略的整体速度。功率模型预测相应的横向扩展和纵向扩展配置的功率。它同时捕获由线程同步和异构内核之间的线程迁移导致的功率变化。我们以分析的方式建立性能和功率模型,并牢记计算的复杂性。此优点可为运行时管理提供一套全面而低复杂度的模型。这些模型在具有完整系统仿真的大规模异构多核架构上得到了验证。对于性能预测,平均误差低于12%,低于最新方法的平均误差。对于功率预测,平均误差为7.74%。在这些模型的顶部,我们介绍了两种启发式调度算法:面向性能的MAX-P和面向功率效率的MAX-E,以演示这些模型的用法。结果表明,MAX-P的性能平均比最先进的方法高18%。 MAX-E在功率效率方面平均比基准高出70%。

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