Embedded Architecture with Hardware Accelerator for Target Recognition in Driver Assistance System

摘要

This paper presents a new Radar-based recognition system, which is able to identify obstacles during a vehicle movement. Obstacles recognition gives the benefits of avoiding false alarms and allows generating alarms that take into account the identification of the obstacle in front of the vehicle. In this paper, we first identify hotspots in the target recognition application. Then, we propose an optimized version of the multiple target recognition algorithm to respect the real time constraints of the application while simplifying the underlying hardware platform. We also propose a flexible embedded architecture with hardware accelerator that supports the proposed algorithm. Using a low cost FPGA-based System-on-Chip, our system is able to detect and recognize more than 10 obstacles of different types in a time limit of 25 mSec.