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A New Approach to Analysis and Design of Chaos-Based Random Number Generators Using Algorithmic Converter

机译:基于算法转换器的基于混沌的随机数发生器分析与设计的新方法

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This paper presents a new approach to analysis and design of ADC-based random number generators. To this end, different full-bit and half-bit redundant stages of algorithmic converter are used to design chaotic maps. It is shown that, in the redundant and nonredundant structures, output probability density function of the converter stages and their related chaotic functions always converge to uniformity. It is demonstrated that residues become independent and uniformly distributed. This fact leads to the randomness and uniformity of distribution of the random number generator output bits. Moreover, it is shown that some common chaotic maps that are employed in chaotic random number generators can be implemented using nonredundant and half-bit redundant stages of algorithmic converter. In this way, the capability of ADC-based generators in designing chaotic maps and producing random number sequences is illustrated. The validity of the proposed chaos-based random number generator is confirmed using NIST statistical tests even in the presence of nonidealities in algorithmic converter. Since the ADCs are mixed-signal integrated circuits and can be used in high-speed applications, the ADC-based random number generator has high throughput and is easily embeddable in all analog and digital circuits.
机译:本文提出了一种新的方法来分析和设计基于ADC的随机数发生器。为此,算法转换器使用不同的全位和半位冗余级来设计混沌映射。结果表明,在冗余和非冗余结构中,转换器级的输出概率密度函数及其相关的混沌函数始终收敛于均匀性。证明了残基变得独立且均匀分布。这一事实导致随机数发生器输出位的分布的随机性和均匀性。而且,示出了可以使用算法转换器的非冗余和半位冗余级来实现在混沌随机数发生器中采用的一些常见的混沌图。这样,说明了基于ADC的生成器在设计混沌映射和生成随机数序列方面的能力。即使在算法转换器中存在非理想性的情况下,使用NIST统计测试也可以验证所提出的基于混沌的随机数生成器的有效性。由于ADC是混合信号集成电路,并且可以用于高速应用,因此基于ADC的随机数发生器具有很高的吞吐量,并且很容易嵌入到所有模拟和数字电路中。

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