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A Digital Adaptive Calibration Method of Timing Mismatch in TIADC Based on Adjacent Channels Lagrange Mean Value Difference

机译:基于相邻通道拉格朗日平均值差异的TIADC时序不匹配的数字自适应校准方法

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This paper presents a digital adaptive calibration method to overcome the effect of timing mismatches in the time-interleaved analog-to-digital converter (TIADC). The structure of the channel splitting-recombining is proposed. The TIADC with M channels is divided into log(2)M stages for calibration, and each stage is composed of one or more two-channel sub-systems. The Lagrange mean value difference of adjacent channels is constructed by arithmetical approximation to estimate the timing mismatch. It does not need to oversample the bandlimited input signal with an oversampling ratio. And it does not require the input signal to have significant power over its bandwidth for identification. Timing mismatches are corrected by the cascaded differentiator-multipliers. A reuse structure is developed to reduce the consumption of hardware resources. Simulation results of the four-channel TIADC show that the spurious-free dynamic range (SFDR) can be improved from 31.19 to 73.39 dB. Hardware implementation based on FPGA is also carried out, and the corrected SFDR is measured at 72.29 dB. The approach has low complexity, and the bandwidth of the input signal can reach the Nyquist bandwidth of the complete TIADC system.
机译:本文介绍了一种数字自适应校准方法,以克服时间交错模数转换器(TIADC)中定时不匹配的效果。提出了通道分裂重组的结构。具有M个通道的TIADC被分为校准的LOG(2)M级,并且每个阶段由一个或多个双通道子系统组成。相邻通道的拉长平均值差异由算术近似构成,以估计定时不匹配。它不需要利用带有过采样比例的带状输入信号。并且它不需要输入信号在其带宽上具有显着的功率以进行识别。级联差分器乘法器校正定时不匹配。开发了一种重用结构以减少硬件资源的消耗。四通道TIADC的仿真结果表明,无杂散的动态范围(SFDR)可以从31.19提高到73.39 dB。还执行基于FPGA的硬件实现,并在72.29 dB中测量校正的SFDR。该方法具有较低的复杂性,输入信号的带宽可以达到完整的TIADC系统的Nyquist带宽。

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