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A 385 MHz 13.54 K Gates Delay Balanced Two-Level CAVLC Decoder for Ultra HD H.264/AVC Video

机译:用于超高清H.264 / AVC视频的385 MHz 13.54 K门延迟均衡两电平CAVLC解码器

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To satisfy the heavy performance requirement in real-time high-resolution H.264/AVC, very large-scale integrated implementation of the entropy decoder is necessary since it dominates the overall decoder throughput. In this paper, we propose a high-throughput delay balanced two-level context-based adaptive variable length coding (CAVLC) decoder with 21% shorter critical path delay in comparison to the traditional two-level decoder design. Furthermore, redundant decoding processes are removed by a skipping mechanism. The proposed CAVLC decoder only needs 127.13 cycles per macroblock on average to support level 5.1 decoding with 13.54 k gate counts under 90-nm CMOS technology.
机译:为了满足实时高分辨率H.264 / AVC的强大性能要求,熵解码器的大规模集成实现是必要的,因为它支配了整个解码器的吞吐量。在本文中,我们提出了一种高吞吐量的延迟均衡两级基于上下文的自适应可变长度编码(CAVLC)解码器,与传统的两级解码器设计相比,其关键路径延迟短了21%。此外,通过跳过机制去除了冗余解码处理。所提出的CAVLC解码器平均每个宏块仅需要127.13个周期,即可在90nm CMOS技术下以13.54 k的门数支持5.1级解码。

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