On the design of a fourth-order continuous-time LC delta-sigmamodulator for UHF A/D conversion

摘要

We consider the design and test of a fourth-order bandpassndelta-sigma modulator (ΔΣM) for conversion of UHF analognsignals to the digital domain for heterodyning and processing there. Anprototype modulator in 0.5-Μm SiGe presented in the second part ofnthe paper achieved 40 dB of dynamic range in a 20-MHz bandwidth centerednat 1 GHz and consumed 450 mW from a single 5-V supply. At the time thisnmodulator was designed, no explicit design procedure to achieve ancertain modulator performance level had been established. The first partnof this paper, therefore, is devoted to explaining the tradeoffsninvolved in choosing the parameters for a gigahertz-clockingntransconductor/LC-based ΔΣM and formulating such an explicitndesign procedure. Finally, we elucidate some further designnconsiderations, redesign the prototype to improve its simulatednperformance, and discuss the general appropriateness of high-speedncontinuous-time ΔΣM for UHF analog-to-digital conversion