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An Active-Frequency Compensation Scheme for CMOS Low-Dropout Regulators With Transient-Response Improvement

机译:具有瞬态响应改进的CMOS低压降稳压器的有源频率补偿方案

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An active-frequency compensation circuit for low- dropout regulators (LDOs) is presented. Compared with the conventional compensation scheme, the proposed circuit can greatly boost the effective current multiplication factor by at least one order of magnitude without increasing any power consumption. Hence, the proposed circuit can generate an internal lower frequency zero and push parasitic poles toward extremely high frequency such that the loop bandwidth can be extended drastically. The required on-chip capacitance is reduced to 0.4 pF, comparing to 5 pF in the conventional compensation scheme. The slew rate at the gate drive of the LDO is also improved by the proposed error amplifier. Implemented in a 0.35- $mu$m 2P4M CMOS process, the LDO with the proposed active-frequency compensation circuit consumes 27 $mu$ A ground current at 150-mA maximum output current with a dropout voltage of 200 mV. Experimental results show that the proposed LDO structure has achieved only 10% settling time of the conventional compensation scheme.
机译:提出了一种低压差稳压器(LDO)的有源频率补偿电路。与传统的补偿方案相比,该电路可以将有效电流倍增系数提高至少一个数量级,而不会增加任何功耗。因此,所提出的电路可以产生内部较低的频率零,并将寄生极点推向极高的频率,从而可以大幅扩展环路带宽。与传统补偿方案中的5 pF相比,所需的片上电容降低至0.4 pF。所提出的误差放大器还改善了LDO栅极驱动的压摆率。采用0.35-μm2P4M CMOS工艺实现的LDO与所提出的有源频率补偿电路一起,在150mA最大输出电流下的地电流消耗为27μμA,压差为200mV。实验结果表明,所提出的LDO结构仅实现了传统补偿方案10%的建立时间。

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