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Variation-Resilient Building Blocks for Ultra-Low-Energy Sub-Threshold Design

机译:超低能耗亚阈值设计的抗变变体构建块

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This paper presents the design of variation-resilient ultra-low-voltage circuits functioning at MHz-speed. By careful design, robust digital circuits operating in the sub-threshold region are achieved. The paper discusses circuit techniques to obtain building blocks that are able to overcome the high sensitivity to variations and the decreased current ratios in sub-threshold while retaining MHz-performance. The building blocks are successfully implemented in two chips fabricated in 90 nm CMOS technology. Measurements show that the variation-resilient designs are fully functional at ultra-low supply voltages and obtain clock frequencies in the MHz-range and sub-pJ energy consumptions.
机译:本文介绍了以MHz速度工作的具有变化弹性的超低压电路的设计。通过精心设计,可以实现在亚阈值区域内运行的稳健数字电路。本文讨论了获得积木的电路技术,这些积木能够克服变化的高灵敏度和亚阈值电流比率的降低,同时又保持了MHz性能。这些构建模块已成功地用90 nm CMOS技术制造的两个芯片中实现。测量表明,具有抗变化性的设计在超低电源电压下即可发挥全部功能,并获得MHz范围内的时钟频率和低于pJ的能耗。

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