An All-Digital Scalable and Reconfigurable Wide-Input Range Stochastic ADC Using Only Standard Cells

摘要

An all-digital programmable and reconfigurable stochastic analog-to-digital converter (ADC) is presented in this work. This ADC directly benefits from scaling by using only digital gates and relying on an increased mismatch between minimum‐sized transistors. The programmability and reconfigurability are achieved by dividing the design into eight channels. The mean of each channel is set independently using a digitally generated analog reference voltage with a 10-bit control word. The output of each channel is linearized using Gaussian linear interpolation. The entire ADC is written in Verilog and synthesized into digital standard cells using regular digital design tools. Fabricated in a 130-nm complementary metal–oxide–semiconductor process, the ADC covers signal-to-noise and distortion ratio from 28 to 34.9 dB with a programmable differential input range of 400–800 mVpp at 140 MS/s and 0.7-V supply.