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首页> 外文期刊>IEEE transactions on circuits and systems. II, Express briefs >A 17.4-b Delta-Sigma Capacitance-to-Digital Converter for One-Terminal Capacitive Sensors
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A 17.4-b Delta-Sigma Capacitance-to-Digital Converter for One-Terminal Capacitive Sensors

机译:用于1端电容传感器的17.4bΔ-Σ电容数字转换器

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摘要

In this brief, we present a capacitance-to-digital converter (CDC) for one-terminal capacitive sensors. The designed CDC implements a digital correction technique to reduce nonidealities and noises, such as the offset, 1/f noise, and power supply noise. This correction technique can also minimize effectively the complexity of the analog front-end circuit. All sensor functions, including analog circuits (delta-sigma CDC, bandgap reference, and voltage regulator) and digital logics (microprocessor, memories, and interface logics), are integrated into a single chip and occupy approximately 90% of the area. The chip is fabricated in a 0.18-μm standard CMOS process, which does not have a deep n-well stage. The analog and digital circuits, including the digital input/output pads, must share the same substrate in this design. However, the measurement results demonstrate highly effective resolutions of 16 to 17.4 b, which are achieved with different conversion times.
机译:在本文中,我们介绍了一种用于单端电容式传感器的电容数字转换器(CDC)。设计的CDC实施了数字校正技术,以减少非理想性和噪声,例如失调,1 / f噪声和电源噪声。该校正技术还可以有效地最小化模拟前端电路的复杂性。所有传感器功能,包括模拟电路(delta-sigma CDC,带隙基准和稳压器)和数字逻辑(微处理器,存储器和接口逻辑),都集成到单个芯片中,约占90%的面积。该芯片采用0.18μm标准CMOS工艺制造,没有深n阱阶段。在此设计中,包括数字输入/输出焊盘在内的模拟和数字电路必须共享同一基板。但是,测量结果表明,使用不同的转换时间可以获得16至17.4 b的高效分辨率。

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