机译:嵌入式视觉应用中用于卷积神经网络的资源受限的硬件加速器
School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran;
School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran;
School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran;
Department of Computer Engineering, Shahid Rajaee Teacher Training University, Tehran, Iran;
Convolution; Kernel; Computer architecture; Acceleration; Neural networks; Hardware; Field programmable gate arrays;
机译:用于资源限制应用的卷积神经网络流式加速器
机译:用于深度卷积神经网络的低功耗和移动硬件加速器
机译:低功耗和移动硬件加速器,用于深卷积神经网络
机译:受邀:面向嵌入式视觉应用的深度神经网络和神经网络加速器的协同设计
机译:基于FPGA的嵌入式设备卷积神经网络的加速器
机译:动物农业卷积神经网络计算机视觉系统的实践与应用:综述
机译:用于资源限制应用的卷积神经网络流式加速器