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Dynamic Data-Dependent Reference to Improve Sense Margin and Speed of Magnetoresistive Random Access Memory

机译:动态数据相关参考,以改善磁阻随机存取存储器的感测裕度和速度

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摘要

Magnetoresistive random access memory (MRAM) suffers from low magnetoresistance ratio and serious variations in both low-resistance state (RP) and high-resistance state (RAP). The resulting narrow resistance window between RP and RAP makes it difficult to acquire a sufficient sense margin for accurate read operation. In this brief, a novel read circuit for MRAM is proposed with dynamic data-dependent reference current to improve the sense margin. Instead of using the average of read currents of a pair of dummy RP and RAP cells as reference, our reference current is generated in a data-dependent manner by subtracting the read current of the selected cell from the sum of read currents of a pair of dummy RP and RAP cells. Thus, a larger or smaller reference current can be obtained for the read of RAP or RP cell, respectively, helping in expanding the sense margins. The larger sense margin can further improve the sense speed and the read yield. Evaluation shows that 2× increase in typical sense margin, 60% reduction in sense time, and remarkable reduction in bit error rate are achieved compared with the conventional averaging reference scheme. The accompanying cost in power consumption is acceptable.
机译:磁阻随机存取存储器(MRAM)具有磁阻比低以及低电阻状态(RP)和高电阻状态(RAP)严重变化的问题。 RP和RAP之间的电阻窗口变窄,难以获得足够的感测裕度以进行准确的读取操作。在此简介中,提出了一种新颖的MRAM读取电路,该电路具有与动态数据相关的参考电流,以改善检测裕度。而不是使用一对虚拟RP和RAP单元的读取电流平均值作为参考,而是通过从一对RP和RAP对的读取电流总和中减去所选单元的读取电流来以数据相关的方式生成参考电流。虚拟RP和RAP单元。因此,分别读取RAP或RP单元可获得更大或更小的参考电流,从而有助于扩大感测裕度。较大的感测裕度可以进一步提高感测速度和读取成品率。评估表明,与传统的平均参考方案相比,典型的检测裕度增加了2倍,检测时间减少了60%,并且误码率显着降低。随之而来的功耗成本是可以接受的。

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  • 作者单位

    ASIC and System State Key Laboratory, Department of Microelectronics, Fudan University, Shanghai, China;

    ASIC and System State Key Laboratory, Department of Microelectronics, Fudan University, Shanghai, China;

    ASIC and System State Key Laboratory, Department of Microelectronics, Fudan University, Shanghai, China;

    ASIC and System State Key Laboratory, Department of Microelectronics, Fudan University, Shanghai, China;

    ASIC and System State Key Laboratory, Department of Microelectronics, Fudan University, Shanghai, China;

    ASIC and System State Key Laboratory, Department of Microelectronics, Fudan University, Shanghai, China;

    ASIC and System State Key Laboratory, Department of Microelectronics, Fudan University, Shanghai, China;

    Technology Development Center, Semiconductor Manufacturing International Corporation, Shanghai, China;

    Technology Development Center, Semiconductor Manufacturing International Corporation, Shanghai, China;

    Technology Development Center, Semiconductor Manufacturing International Corporation, Shanghai, China;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Transistors; IP networks; Latches; Random access memory; Magnetoresistance; Resistance;

    机译:晶体管;IP网络;闩锁;随机存取存储器;磁阻;电阻;

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