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A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications

机译:基于MIG逻辑的几步和低成本的映像逻辑,用于IOT应用程序中的频繁立即电路

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Nonvolatile logic implemented by memristor devices is a potential candidate for inherent logic-in-memory architecture. Majority-inverter graph (MIG) logic is a novel logic-structure compared with conventional AND/OR/INV graphs logic. In this brief, MIG logic constructed by memristors is proposed to implement the stateful logic arithmetic. A design of full adders based on MIG logic is proposed, followed by a 4-bit Wallace tree multiplier based on the MIG logic to implement in-situ store. A test chip controlled by a FPGA is designed to verify its feasibility. Compared with multipliers implemented by conventional logic, this method has fewer steps and smaller area, making it suitable for frequent-off and instant-on circuits in IoT applications. The experimental results have proved its significance on the grounds that the 4-bit multiplier only needs 18 processing steps with 51 memristor cells to complete a multiplication arithmetic whereas, by contrast, one conventional 4-bit binary multiplier requires 648 MOSFETs and 124 steps while IMP based 4-bit multiplier logic requires 112 CRS units and 221 steps to operate a multiplying computation.
机译:由Memristor设备实现的非易失性逻辑是固有逻辑内存架构的潜在候选者。多数逆变器图(MIG)逻辑是一种新颖的逻辑结构,与传统和/或/或/ inv图逻辑相比。在此简介中,提出了由Memristors构造的MIG逻辑来实现状态逻辑算术。提出了一种基于MIG逻辑的完整添加剂的设计,其次是基于MIG逻辑的4位Wallace树乘数来实现原位存储。由FPGA控制的测试芯片旨在验证其可行性。与传统逻辑实现的乘法器相比,该方法具有更少的步骤和更小的区域,使其适用于IOT应用中的频繁和即时的电路。实验结果证明了其对4位乘法器仅需要18个处理步骤的实验结果,以完成乘法算术,而相反,一个传统的4位二进制乘数需要648个MOSFET和124步基于4位乘数逻辑需要112个CRS单元和221个步骤来操作乘法计算。

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